PPLCNet (PaddlePaddle Lightweight CPU Network) is a lightweight convolutional neural network architecture. Its core idea is to combine Large Receptive Field Blocks with multi-scale feature fusion modules to achieve model miniaturization and efficient inference on CPUs and various other hardware, all while maintaining accuracy. This design enables PPLCNet to excel in computational efficiency, model size, and inference speed, making it particularly suitable for latency-sensitive edge devices and mobile applications, while still achieving high classification accuracy. PPLCNet is primarily applied in image classification tasks and can also be extended to areas such as object detection and semantic segmentation. Typical variants of PPLCNet include PPLCNet_x0_5, PPLCNet_x1_0, and PPLCNet_x2_5, which adapt to different performance requirements by adjusting the network width.

Source model

• Input shape: 224x224
• Number of parameters: 0.51M
• Model size: 5.81M
• Output shape: 1x1000

Source model repository：PaddleClas

Model Farm provides optimized model resources and test code, which can be obtained through the following two methods:

• Obtain via Model Farm page: Click Models & Test Code in the Performance Reference section on the right to obtain model resources and code packages.

• Obtain via command line (Recommand): Users with APLUX development boards can obtain model resources and code packages through the built-in MMS tool.

# Search Models
mms list [model name]

# Get Models
mms get -m [model name] -p [precision] -c [soc] -b [backend] -d [file path]

For MMS usage, please refer to: MMS Usage & Access to Preview Models

When the user has fine-tuned the source model, the model conversion process must be performed again.

Users can refer to either of the following two methods to complete the model conversion:

• Using AIMO for model conversion: Click Model Conversion Reference in the Performance Reference section on the right to view the conversion steps.

• Using Qualcomm QNN for model conversion: Please refer to the Qualcomm QNN Documentation.

The model performance benchmarks and example code provided by Model Farm are all implemented based on the APLUX AidLite SDK.

For models in .bin format, you can use either of the following two inference engines to run inference on Qualcomm chips:

Inference using APLUX AidLite: please refer to the APLUX AidLite Developer Documentation

Inference using Qualcomm QNN: Please refer to the Qualcomm QNN Documentation

Inference Example Code

The inference example code is implemented using the AidLite SDK.

Click Model & Code to download the model files and the inference code package. The file structure is as follows:

/{model_name}_{SoC Name}_{Precision}
    
    |__ models # folder where model files are stored    
    
    |__ code # aidlite python model inference example

        |__ python # aidlite python model inference example

        |__ cpp # aidlite cpp model inference example

        |__ README.md